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[VHDL-FPGA-Verilog] 128×16ram

Description: VHDL程序设计的RAM存储器，双端口，128×16比特-VHDL programming RAM memory, dual-port, 128 × 16 bits
Platform: | Size: 1024 | Author: petri | Hits:

[VHDL-FPGA-Verilog] real_module

Description: 对进来的数据进行乒乓操作，例如0-63出来的结果是31-0,63-32.进来和出去为同一时钟，且都是流水线方式，结构为双口RAM.-Ping-pong on the incoming data operations, such as 0-63, the results are 31-0,63-32. Come in and out of the same clock, and are pipelined, the structure of dual-port RAM.
Platform: | Size: 1914880 | Author: 王海生 | Hits:

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